AMD's core-heavy EPYC Rome processors are scheduled to be released in the middle of this year, so naturally, the chipmaker samples the chips to its partners before the launch. Now the 32-core, 64-thread EPYC chip has been spotted in the SiSoftware Official Live Ranker database with a 1.7 GHz base clock speed and a 2.4 GHz boost, which is significantly lower than the previous-gen model.
SiSoftware's Sandra is a popular benchmarking software in the hardware world, so it isn't surprising to find unannounced products in its database. A couple of months ago, the 64-core EYPC Rome processor made its appearance in the same place. Curiously, the 64-core part was housed inside Dell's PowerEdge R7515 server, while today's 32-core part was captured inside the PowerEdge R6515. The expansion of Dell's server line with the next-gen EPYC processors is expected though, as a company representative recently said the company is tripling its AMD server offerings.
|Processor||Cores / Threads||Base Clock||Boost Clock||L3 Cache||TDP|
|AMD ZS1406E2VJUG5_22/14_N||64 / 128||1.4 GHz||2.2 GHz||256MB||?|
|Intel Xeon Platinum 9282||56 / 112||2.6 GHz||3.8 GHz||77MB||400W|
|Intel Xeon Platinum 9242||48 / 96||2.3 GHz||3.8 GHz||71.5MB||350W|
|AMD ZS1711E3VIVG5_24/17_N||32 / 64||1.7 GHz||2.4 GHz||128MB||?|
|AMD EPYC 7601||32 / 64||2.2 GHz||3.2 GHz||64MB||180W|
|Intel Xeon Platinum 8280||28 / 56||2.7 GHz||4.0 GHz||38.5MB||205W|
As with any unreleased processor, the 32-core EPYC Rome processor doesn't have a model name yet. Instead, it's carrying the ZS1711E3VIVG5_24/17_N product identifier.
The chip seemingly features a 1.7 GHz base clock, 2.4 GHz boost clock, 16MB of L2 cache and a doubling to 128MB of L3 cache. The "Z" prefix suggests that the leaked processor in question is a qualification sample (QS). Therefore, the specifications could be very close to the final product. That makes the relatively low clock speeds an interesting aspect, especially in comparison to the previous-gen 32-core EPYC 7601. Overall the Rome model appears to come with 500 MHz to 800 MHz clock regressions (base/boost). AMD will likely offset the lower clocks with a commensurate increase in instructions per clock (IPC) throughput, but it remains to be seen how the aggregate real-world performance will compare to the previous-gen models.
AMD could also increase the clock speeds before launch, but recent comments from the company indicate there may be some concerns with clock speeds on next-gen manufacturing nodes.
If we look at pure core count, AMD is obviously leading the way with the flagship 64-core EPYC monster. Intel recently introduced the Xeon Platinum 9000-series that arrived with the 56-core Xeon Platinum 9282 and 48-core Xeon Platinum 9242 parts. However, Intel is taking the same approach of connecting two die together with a fabric (referred to with the technical term "glue logic") just like AMD. If we look at it objectively, the 28-core Xeon Platinum 8280 is the only true monolithic-die competitor to AMD's 32-core EPYC offerings.
We still aren't sure of the TDP rating of these 7nm EPYC Rome models, but given the purported power advantages of the 7nm node, it should undercut Intel's Xeon lineup on a core-for-core basis.
We caution that these aren't official specs or numbers, and given the strong uptake of AMD's EPYC Rome processors in the HPC space, AMD could offset any possible clock regressions with overall performance improvements borne of Zen 2's architectural advances. We expect to learn more about the full spate of AMD's 7nm products both at Computex and its pre-E3 show.
- Zhiye Liu,